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First-Rate Safety, High Reliability, Downsizing, and Large Storage Capacity

Multiple Redundant Flight Control Computer

With the up-to-date self-monitoring processor as its core processor, the computation credibility of the processing module is enhanced.

The flight control computer's architecture takes the high-speed LVDS serial backplane bus as its core. The FCC implements the multiple redundant configuration for CPU, interfaces, and power supply in the manner of resource allocation. Adopting the main/standby operating mode, it is capable of fault tolerance and thus is still operable when a failure occurs.

Product Highlights

First-rate safety, high reliability, downsizing, and abundant interfaces

Support for PUBIT, IFBIT, and GBIT, high test coverage

Technical Specifications

300Mhz

Up-to-date self-monitoring processor with the dominant frequency reaching 300 MHz, embedded with L1cache

Ultra-large capacity

Embedded with data storage unit of ultra-large capacity and file management system

100 MB bandwidth

Serial LVDS backplane bus with 100 MB bandwidth

Applications

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Modification from 700 kg manned helicopter to unmanned platform

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R&D of 500 kg coaxial unmanned helicopter

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3-ton UAV platform

Contact Us

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